1. Field of the Invention
The embodiments herein relate to generating performance targets for active semiconductor devices and, more particularly, to a method, system and program storage device for generating more accurate performance targets for active semiconductor devices during new technology node development.
2. Description of the Related Art
During the early stages of new technology node development, engineers do not have actual hardware from which to take performance measurements. Thus, they will typically generate performance targets (i.e., target performance characteristics) for active semiconductor devices in the new technology node based on assumptions and on measurements taken from hardware in previous technology nodes. Unfortunately, such performance targets may turn out to be incorrect and lead, at the modeling stage of the new technology node development, to unnecessary and time consuming iterations for the model extraction process and/or inferior model quality.
At the stage following the early stage of technology development (i.e., during the technology development stage of process optimization) prototype hardware (i.e., early hardware) will be available and will be utilized to influence the model build as much as possible. Specifically, prototype hardware measurements will be taken and plotted against the performance targets to visually determine whether the performance targets that will be used for modeling are supported by the hardware measurements (i.e., to visually verify the accuracy of the performance targets). These prototype hardware measurements may, however, be influenced by defects and strong process variations. Consequently, the resulting plots may be affected by large statistical errors and, thereby may provide support for inaccurate performance targets (e.g., for performance targets which actually violate the principles of semiconductor device physics and/or scaling laws). When such inaccurate performance targets are used as model inputs, they may lead to contradictions during the model build and will be rejected outright such that new performance targets have to be generated and verified, thereby leading to unnecessary and time consuming iterations for the model extraction process. Furthermore, if the inaccurate performance targets are not rejected outright, their use as model inputs could lead to inferior model quality and, thereby false conclusions performance.
Therefore, there is a need in the art for a technique for generating more accurate performance targets for active semiconductor devices during the technology node development stage in order to reduce the number of iterations required for the model extraction process and/or improve model quality.